[PATCH 04/12] arm64: dts: zynqmp: Enable and wire reset controller

Laurent Pinchart laurent.pinchart at ideasonboard.com
Sun Dec 6 17:38:21 EST 2020


Hi Michal,

Thank you for the patch.

On Wed, Dec 02, 2020 at 03:06:03PM +0100, Michal Simek wrote:
> Enable reset controller for several IPs.
> 
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 ++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 68923fbd0e89..4fa820f78d76 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -187,6 +187,11 @@ zynqmp_pcap: pcap {
>  			xlnx_aes: zynqmp-aes {
>  				compatible = "xlnx,zynqmp-aes";
>  			};
> +
> +			zynqmp_reset: reset-controller {
> +				compatible = "xlnx,zynqmp-reset";
> +				#reset-cells = <1>;
> +			};
>  		};
>  	};
>  
> @@ -466,6 +471,8 @@ gem0: ethernet at ff0b0000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_ETH_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
> +			reset-names = "gem0_rst";

I don't see any of the reset-names used in this patch defined in DT
bindings (or used in drivers). For all devices but the USB controllers
it seems they can be dropped. For the USB controllers, the bindings need
to be updated first.

>  		};
>  
>  		gem1: ethernet at ff0c0000 {
> @@ -478,6 +485,8 @@ gem1: ethernet at ff0c0000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_ETH_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
> +			reset-names = "gem1_rst";
>  		};
>  
>  		gem2: ethernet at ff0d0000 {
> @@ -490,6 +499,8 @@ gem2: ethernet at ff0d0000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_ETH_2>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
> +			reset-names = "gem2_rst";
>  		};
>  
>  		gem3: ethernet at ff0e0000 {
> @@ -502,6 +513,8 @@ gem3: ethernet at ff0e0000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_ETH_3>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
> +			reset-names = "gem3_rst";
>  		};
>  
>  		gpio: gpio at ff0a0000 {
> @@ -515,6 +528,8 @@ gpio: gpio at ff0a0000 {
>  			#interrupt-cells = <2>;
>  			reg = <0x0 0xff0a0000 0x0 0x1000>;
>  			power-domains = <&zynqmp_firmware PD_GPIO>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_GPIO>;
> +			reset-names = "gpio_rst";
>  		};
>  
>  		i2c0: i2c at ff020000 {
> @@ -526,6 +541,8 @@ i2c0: i2c at ff020000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_I2C_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_I2C0>;
> +			reset-names = "i2c0_rst";
>  		};
>  
>  		i2c1: i2c at ff030000 {
> @@ -537,6 +554,8 @@ i2c1: i2c at ff030000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			power-domains = <&zynqmp_firmware PD_I2C_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_I2C1>;
> +			reset-names = "i2c1_rst";
>  		};
>  
>  		pcie: pcie at fd0e0000 {
> @@ -602,6 +621,8 @@ sata: ahci at fd0c0000 {
>  			interrupt-parent = <&gic>;
>  			interrupts = <0 133 4>;
>  			power-domains = <&zynqmp_firmware PD_SATA>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
> +			reset-names = "sata_rst";
>  		};
>  
>  		sdhci0: mmc at ff160000 {
> @@ -733,6 +754,10 @@ usb0: usb at fe200000 {
>  			reg = <0x0 0xfe200000 0x0 0x40000>;
>  			clock-names = "clk_xin", "clk_ahb";
>  			power-domains = <&zynqmp_firmware PD_USB_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
> +				 <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
> +				 <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;
> +			reset-names = "usb0_crst", "usb0_hibrst", "usb0_apbrst";
>  		};
>  
>  		usb1: usb at fe300000 {
> @@ -743,6 +768,10 @@ usb1: usb at fe300000 {
>  			reg = <0x0 0xfe300000 0x0 0x40000>;
>  			clock-names = "clk_xin", "clk_ahb";
>  			power-domains = <&zynqmp_firmware PD_USB_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
> +				 <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
> +				 <&zynqmp_reset ZYNQMP_RESET_USB1_APB>;
> +			reset-names = "usb1_crst", "usb1_hibrst", "usb1_apbrst";
>  		};
>  
>  		watchdog0: watchdog at fd4d0000 {

-- 
Regards,

Laurent Pinchart



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