[PATCH] ARM: socfpga: arria10: fix timer3 address

[Steffen Trumtrar]

Since commit 6d2e16a3181b ("clocksource: dw_apb_timer_of: Fix missing
clockevent timers") the dw_apb_timer_of code tries to add a clockevent
for timer3. This reveals the wrong register offset that is provided in
the timer3-node in the socfpga_arria10 devicetree which in turn results
in

  Unhandled fault: imprecise external abort (0x406) at 0xbea9fe20

and therefore in a kernel panic.

Set the offset to the correct value.

Cc: stable at vger.kernel.org
Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 7b8961794a82..a5bd4537766d 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -852,7 +852,7 @@
 		timer3: timer3 at ffd00100 {
 			compatible = "snps,dw-apb-timer";
 			interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
-			reg = <0xffd01000 0x100>;
+			reg = <0xffd00100 0x100>;
 			clocks = <&l4_sys_free_clk>;
 			clock-names = "timer";
 			resets = <&rst L4SYSTIMER1_RESET>;
-- 
2.28.0