[PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed

Nishanth Menon nm at ti.com
Fri Aug 28 07:32:14 EDT 2020


On 08:34-20200828, Sekhar Nori wrote:
> On 28/08/20 5:54 AM, Nishanth Menon wrote:
> > On 10:13-20200827, Sekhar Nori wrote:
> >> Hi Nishanth,
> >>
> >> On 02/08/20 10:23 PM, Sekhar Nori wrote:
> >>> Per errata i2104 documented in AM65x device errata document (TI document
> >>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> >>> both PCIe Root Complex and Endpoint modes of operation.
> >>>
> >>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> >>>
> >>> Restrict speed to Gen2 to address the errata.
> >>>
> >>> Signed-off-by: Sekhar Nori <nsekhar at ti.com>
> >>
> >> Is this in your queue or should I rebase and resend?
> > 
> > Thanks for the reminder. I have put it on my staging branch for now.
> > Once rc3 gets tagged with irqchip related changes, I will move this over
> > to next.
> 
> Hmm, this is errata fix and fair game for -rc cycle. Can we have this in
> v5.9 itself?

We could, but does'nt seem urgent enough for 5.9 cycle since the dts node
was'nt introduced in this cycle, I think it was introduced around 5.3 or
so?

> 
> > 
> > Now, that said, Please consider converting
> > Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml sometime
> > in near future, if possible.
> > 
> > We might also want to spend a little more time with W=2 dtbs build and
> > dtbs_check to cleanup.
> 
> Sure, will add to TODO.

Thanks.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D



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