[PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed

[Nishanth Menon]

On 10:13-20200827, Sekhar Nori wrote:
> Hi Nishanth,
> 
> On 02/08/20 10:23 PM, Sekhar Nori wrote:
> > Per errata i2104 documented in AM65x device errata document (TI document
> > number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> > both PCIe Root Complex and Endpoint modes of operation.
> > 
> > See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> > 
> > Restrict speed to Gen2 to address the errata.
> > 
> > Signed-off-by: Sekhar Nori <nsekhar at ti.com>
> 
> Is this in your queue or should I rebase and resend?

Thanks for the reminder. I have put it on my staging branch for now.
Once rc3 gets tagged with irqchip related changes, I will move this
over to next.

Now, that said, Please consider converting
Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml
sometime in near future, if possible.

We might also want to spend a little more time with W=2 dtbs build and
dtbs_check to cleanup.

-- 
Regards,
Nishanth Menon
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