[PATCH v2 8/8] arm64: dts: ti: k3-j721e-som-p0: Reserve memory for IPC between RTOS cores
Suman Anna
s-anna at ti.com
Tue Aug 25 13:21:45 EDT 2020
Add a reserved memory node to reserve a portion of the DDR memory to be
used for performing inter-processor communication between all the remote
processors running RTOS on the TI J721E EVM boards. 28 MB of memory is
reserved for this purpose, and this accounts for all the vrings and vring
buffers between all the possible pairs of remote processors.
Signed-off-by: Suman Anna <s-anna at ti.com>
---
v2: No changes
v1: https://patchwork.kernel.org/patch/11725341/
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index 0e28be492ac2..d69d90c8b5e3 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -61,6 +61,12 @@ c71_0_memory_region: c71-memory at a8100000 {
reg = <0x00 0xa8100000 0x00 0xf00000>;
no-map;
};
+
+ rtos_ipc_memory_region: ipc-memories at aa000000 {
+ reg = <0x00 0xaa000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
};
--
2.28.0
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