[PATCH] arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

[Michal Simek]

Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
chip is "using the advanced eXtensible interface (AXI) point-to-point
channels for communicating addresses, data, and response transactions
between master and slave clients."

Issues are reported as:
...: amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
...: amba-apu at 0: $nodename:0: 'amba-apu at 0' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

The only one problem with this patch is that it breaks paths in
/proc/device-tree/.
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 165a95a106c8..98073f3223e5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -182,7 +182,7 @@ fpga_full: fpga-full {
 		ranges;
 	};
 
-	amba_apu: amba-apu at 0 {
+	amba_apu: axi at 0 {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <1>;
@@ -201,7 +201,7 @@ gic: interrupt-controller at f9010000 {
 		};
 	};
 
-	amba: amba {
+	amba: axi {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
2.28.0