[PATCH v1 6/6] ARM: BCM5301X: Add DT for Meraki MR32

Christian Lamparter chunkeey at gmail.com
Tue Aug 18 22:46:16 EDT 2020


On 2020-08-19 02:07, Ray Jui wrote:
> 
> 
> On 8/18/2020 3:52 PM, Christian Lamparter wrote:
>> Hello Florian,
>>
>> On 2020-08-18 22:11, Florian Fainelli wrote:
>>>
>>>
>>> On 8/18/2020 9:39 AM, Christian Lamparter wrote:
>>> [snip]
>>>> +    i2c-gpio {
>>>> +        compatible = "i2c-gpio";
>>>> +        sda-gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
>>>> +        scl-gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
>>>> +        i2c-gpio,delay-us = <10>; /* close to 100 kHz */
>>>> +        #address-cells = <1>;
>>>> +        #size-cells = <0>;
>>>
>>> Can you try using the hardware controller here instead of bit banging
>>> i2c over gpios? GPIOs 4 and 5 are the default pins for I2C.
>>
>> Ok. I gave this a try. What I did was:
>>
>> I removed the i2c-gpio node and went with this in the mr32.dts:
>>
>> +&i2c0 {
>> +       status = "okay";
>> +
>> +    clock-frequency = <100000>; /* also tried 400KHz */
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&pinmux_i2c>; /* editted bcm5301x.dtsi for this */
>> +
>> +       cur_mon: ina2xx at 45 {
>> +               compatible = "ti,ina219";
>> +               reg = <0x45>;
>> +               shunt-resistor = <60000>; /* = 60 mOhms */
>> +       };
>> +
>> +       meraki_eeprom: at24 at 50 {
>> +               compatible = "atmel,24c64";
>> +               reg = <0x50>;
>> +               pagesize = <32>;
>> +               read-only;
>> +       };
>> +};
>>
>> I enabled CONFIG_I2C_BCM_IPROC=y and built the whole thing and moved it
>> to the AP.
>>
>> During boot, I now get:
>>
>> |[    1.039174] bcm-iproc-i2c 18009000.i2c: bus set to 100000 Hz
>> |[    8.918419] i2c /dev entries driver
>> [...] (The i2c-bcm-iproc now causes a long "wait" during boot)
>> |[   59.385497] bcm-iproc-i2c 18009000.i2c: transaction timed out
>> |[   59.391272] ina2xx 0-0045: error configuring the device: -110
>> |[  110.585517] bcm-iproc-i2c 18009000.i2c: transaction timed out
>>
> 
> The long wait is probably caused by waiting for the I2C transaction to
> time out, which it eventually did.

Yes.

 >
> 
>> Is there a special magic needed to get this working with bcm5301x's
>> existing i2c0 node?
>>
> 
> Two things to check: 1) if pinmux is configured properly; 
Hm, any tips for testing this? The /sys/kernel/debug/pinctrl is 
populated correctly from what I can tell.

What I don't know is if the DTS in bcm5301x.dtsi.

|        dmu at 1800c000 {
|                compatible = "simple-bus";
|                ranges = <0 0x1800c000 0x1000>;
|                #address-cells = <1>;
|                #size-cells = <1>;
|
|                cru at 100 {
|                        compatible = "simple-bus";
|                        reg = <0x100 0x1a4>;
|                        ranges;
|                        #address-cells = <1>;
|                        #size-cells = <1>;
|
|                        pin-controller at 1c0 {
|                                compatible = "brcm,bcm4708-pinmux";
|                                reg = <0x1c0 0x24>;

Based on my understanding of the DT, the pinctrl register should be at 
0x1800c2c0 (that would be outside of the 0x1a4 size though?!). This is
because of 0x1800c000 (dmu base) + 0x100 (cru reg) + 0x1c0 
(pin-controller reg). If so, here are devmem's output of said region 
(read value is after the "=")

devmem 0x1800c2c0 = 0x0
devmem 0x1800c2c4 = 0x001D2003
devmem 0x1800c2c8 = 0x00000284
devmem 0x1800c2cc = 0x00000284
devmem 0x1800c2d0 = 0x00000285
devmem 0x1800c2d4 = 0x00000284
devmem 0x1800c2d8 = 0x00000284
devmem 0x1800c2dc = 0x00000284
devmem 0x1800c2e0 = 0x00000284
devmem 0x1800c2e4 = 0x00000284

Just in case, I've also checked 0x1800c1c0.
This is because I stumbled over the "Example" in the binding 
Documentation under 
Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt. 
Because this uses a "offset = <0xc0>"
property and seems to be based of the cru at 100 node?!

devmem 0x1800c1c0 = 0x00140037
devmem 0x1800c1c4 = 0x0
devmem 0x1800c1c8 = 0x00FFFFFF
devmem 0x1800c1cc = 0x00FFFFFF
devmem 0x1800c1d0 = 0x0
devmem 0x1800c1d4 = 0x0
devmem 0x1800c1d8 = 0x0
devmem 0x1800c1dc = 0x0
devmem 0x1800c1e0 = 0x0
devmem 0x1800c1e4 = 0x00000283

(I also saw the compatible, in my case it should be 
"brcm,bcm53012-pinmux". Can we get a pinmux: label for the pin-controller?)

Can someone please look up the correct address of the pinctrl register,
or confirm, that this pinctrl for the NorthStar is working as expected?

> 2) if
> interrupt line is configured properly.
 >
> 
> After the long wait and errot, can you check cat /proc/interrupts to see
> if there's any I2C interrupt fired?
No, I don't see any with the combinations listed above. The Interrupt 
count remained at "0" the whole time for the i2c. (From what I can tell, 
the i2c-bcm-iproc also supports polling. But it didn't help either)

  23:          0          0     GIC-0 153 Level     18009000.i2c
  Err:          0

Cheers,
Christian

>> Here are some dumps from debugfs' pinctrl and the bcm5301x.dtsi patch
>>
>> --- /sys/kernel/debug/pinctrl/pinctrl-handles ---
>> Requested pin control handlers their pinmux maps:
>> device: 18009000.i2c current state: default
>>    state: default
>>      type: MUX_GROUP controller pinctrl-ns group: i2c_grp (1) function:
>> i2c (1)
>>
>>
>> --- /sys/kernel/debug/pinctrl/1800c100.cru:pinctrl/pinmux-pins ---
>> Pinmux settings per pin
>> Format: pin (name): mux_owner gpio_owner hog?
>> pin 0 (spi_clk): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 1 (spi_ss): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 2 (spi_mosi): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 3 (spi_miso): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 4 (i2c_scl): 18009000.i2c (GPIO UNCLAIMED) function i2c group i2c_grp
>> pin 5 (i2c_sda): 18009000.i2c (GPIO UNCLAIMED) function i2c group i2c_grp
> 
> This looks right at the framework level, but in case someone who coded
> the pinmux driver screwed up the table mapping, I would suggest using
> devmem to dump out the actual readings of the pinmux registers to be
> 100% certain.
> 
>> pin 8 (pwm0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 9 (pwm1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 10 (pwm2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 11 (pwm3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 12 (uart1_rx): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 13 (uart1_tx): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 14 (uart1_cts): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 15 (uart1_rts): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> ---
>>
>> ---
>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi
>> b/arch/arm/boot/dts/bcm5301x.dtsi
>> index f7bd1587e285..9bb97deb7331 100644
>> --- a/arch/arm/boot/dts/bcm5301x.dtsi
>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
>> @@ -438,7 +438,7 @@ spi-pins {
>>                       function = "spi";
>>                   };
>>
>> -                i2c {
>> +                pinmux_i2c: i2c {
>>                       groups = "i2c_grp";
>>                       function = "i2c";
>>                   };
>>




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