[PATCH 0/2] Whitelist HiSilicon Taishan v110 CPUs for Meltdown

Hanjun Guo guohanjun at huawei.com
Tue Mar 5 05:40:56 PST 2019


From: Hanjun Guo <hanjun.guo at linaro.org>

We met boot stall on D06 which was:

[    3.832098] SMP: Total of 64 processors activated.
[    3.836907] CPU features: detected: GIC system register CPU interface
[    3.843383] CPU features: detected: Privileged Access Never
[    3.848978] CPU features: detected: User Access Override
[    3.854316] CPU features: detected: Common not Private translations
[    3.860609] CPU features: detected: RAS Extension Support
[    3.866027] CPU features: detected: CRC32 instructions
[   94.446811] CPU: All CPU(s) started at EL2
[   94.451053] alternatives: patching kernel code
[   94.499913] devtmpfs: initialized

It turns out that it stucks with the delay at boot for !KASLR kernels,
D06 machine is based on HiSilicon Taishan v110 CPU, which is not susceptible
to Meltdown, Will suggested that we can whitelist the MIDR in kpti_safe_list[]
table [1].

[1]:
http://lists.infradead.org/pipermail/linux-arm-kernel/2019-March/636314.html

Hanjun Guo (2):
  arm64: Add MIDR encoding for HiSilicon Taishan CPUs
  arm64: kpti: Whitelist HiSilicon Taishan v110 CPUs

 arch/arm64/include/asm/cputype.h | 4 ++++
 arch/arm64/kernel/cpufeature.c   | 1 +
 2 files changed, 5 insertions(+)

-- 
1.7.12.4




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