[PATCH v2 3/3] arm64: dts: renesas: r8a774a1: Add CAN nodes

Simon Horman horms at verge.net.au
Tue Sep 11 06:32:21 PDT 2018


On Mon, Sep 10, 2018 at 11:43:15AM +0100, Fabrizio Castro wrote:
> From: Chris Paterson <chris.paterson2 at renesas.com>
> 
> Add the device nodes for both RZ/G2M CAN channels.
> 
> Signed-off-by: Chris Paterson <chris.paterson2 at renesas.com>
> Reviewed-by: Biju Das <biju.das at bp.renesas.com>
> ---
> 
> v1->v2:
> * replaced "renesas,rzg-gen2-can" with "renesas,rcar-gen3-can" as per
>   Geert's comment.
> 
> This patch applies on top of renesas-devel-20180906-v4.19-rc2.

Thanks Fabrizio,

I would like to waif for the bindings to be accepted before accepting this
patch.

> 
>  arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> index 046fc93..867e875 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> @@ -874,6 +874,30 @@
>  			status = "disabled";
>  		};
>  
> +		can0: can at e6c30000 {
> +			compatible = "renesas,can-r8a774a1",
> +				     "renesas,rcar-gen3-can";
> +			reg = <0 0xe6c30000 0 0x1000>;
> +			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 916>, <&can_clk>;
> +			clock-names = "clkp1", "can_clk";
> +			power-domains = <&sysc 32>;
> +			resets = <&cpg 916>;
> +			status = "disabled";
> +		};
> +
> +		can1: can at e6c38000 {
> +			compatible = "renesas,can-r8a774a1",
> +				     "renesas,rcar-gen3-can";
> +			reg = <0 0xe6c38000 0 0x1000>;
> +			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 915>, <&can_clk>;
> +			clock-names = "clkp1", "can_clk";
> +			power-domains = <&sysc 32>;
> +			resets = <&cpg 915>;
> +			status = "disabled";
> +		};
> +
>  		pwm0: pwm at e6e30000 {
>  			compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
>  			reg = <0 0xe6e30000 0 0x8>;
> -- 
> 2.7.4
> 



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