[PATCH/RFT] arm64: dts: renesas: r8a77995-draak: Add MSIOF ch2 pins support

Yoshihiro Kaneko ykaneko0929 at gmail.com
Tue Sep 4 13:22:07 PDT 2018


From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym at renesas.com>

This patch adds support for MSIOF ch2 pinctrl to use the LVDS Control
Connector (CN41) for the Draak board on the R8A77995 SoC.

Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym at renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df at renesas.com>
[ykaneko0929 at gmail.com: deleted the unused reference to 'msiof_ref_clk']
Signed-off-by: Yoshihiro Kaneko <ykaneko0929 at gmail.com>
---

This patch is based on the devel branch of Simon Horman's renesas tree.

 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index a8e8f26..e60b1e4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -135,6 +135,12 @@
 		function = "i2c1";
 	};
 
+	msiof2_pins: spi2 {
+		groups = "msiof2_clk", "msiof2_sync_b",
+			 "msiof2_rxd",  "msiof2_txd";
+		function = "msiof2";
+	};
+
 	pwm0_pins: pwm0 {
 		groups = "pwm0_c";
 		function = "pwm0";
@@ -371,3 +377,10 @@
 		};
 	};
 };
+
+&msiof2 {
+	pinctrl-0 = <&msiof2_pins>;
+	pinctrl-names = "default";
+	/* In case of using this node, please enable this property */
+	/* status = "okay"; */
+};
-- 
1.9.1




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