[PATCH] ARM: debug: enable UART1 for socfpga Cyclone5

[Dinh Nguyen]

Hi Clément,

On 05/03/2018 07:13 AM, Clément Péron wrote:
> Cyclone5 and Arria10 doesn't have the same memory map for UART1.
> 
> Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cylone5.
> 

Do you have a Cyclone5/Arria5 board that is using UART1 for the debug port?

Dinh