[PATCH v4 3/6] RDMA/i40iw: Eliminate duplicate barriers on weakly-ordered archs

Shiraz Saleem shiraz.saleem at intel.com
Wed Mar 21 06:38:06 PDT 2018


On Mon, Mar 19, 2018 at 08:47:45PM -0600, Sinan Kaya wrote:
> Code includes wmb() followed by writel(). writel() already has a barrier on
> some architectures like arm64.
> 
> This ends up CPU observing two barriers back to back before executing the
> register write.
> 
> Create a new wrapper function with relaxed write operator. Use the new
> wrapper when a write is following a wmb().
> 
> Since code already has an explicit barrier call, changing writel() to
> writel_relaxed().
> 
> Signed-off-by: Sinan Kaya <okaya at codeaurora.org>

Acked-by: Shiraz Saleem <shiraz.saleem at intel.com>



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