[PATCH v3 06/10] clk: qcom: cpu-8996: Add support to switch below 600Mhz

[Stephen Boyd]

Quoting Ilia Lin (2018-02-14 05:59:48)
> From: Rajendra Nayak <rnayak at codeaurora.org>
> 
> The CPU clock controllers primary PLL operates on a single VCO range,

s/controllers/controller's/

> between 600Mhz and 3Ghz. However the CPUs do support OPPs with
> frequencies between 300Mhz and 600Mhz. In order to support running the

capitalize 'h' in units please.

> CPUs at those frequencies we end up having to lock the PLL at twice the
> rate and drive the CPU clk via the PLL/2 output and SMUX.
> 
> So for frequencies above 600Mhz we follow the following path
>  Primary PLL --> PLL_EARLY --> PMUX(1) --> CPU clk
> and for frequencies between 300Mhz and 600Mhz we follow
>  Primary PLL --> PLL/2 --> SMUX(1) --> PMUX(0) --> CPU clk
> 
> Signed-off-by: Rajendra Nayak <rnayak at codeaurora.org>
> Signed-off-by: Ilia Lin <ilialin at codeaurora.org>

Rest looks ok, please resend.