[PATCH v5 23/36] drm/bridge: analogix_dp: Move fast link training detect to set_bridge

Archit Taneja architt at codeaurora.org
Tue Mar 13 23:52:13 PDT 2018



On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
> From: zain wang <wzz at rock-chips.com>
> 
> It's too early to detect fast link training, if other step after it
> failed, we will set fast_link flag to 1, and retry set_bridge again. In
> this case we will power down and power up panel power supply, and we
> will do fast link training since we have set fast_link flag to 1. In
> fact, we should do full link training now, not the fast link training.
> So we should move the fast link detection at the end of set_bridge.

Is it possible to re-write this commit message? It's a bit hard to
follow.

Thanks,
Archit

> 
> Cc: Tomasz Figa <tfiga at chromium.org>
> Signed-off-by: zain wang <wzz at rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders at chromium.org>
> Signed-off-by: Sean Paul <seanpaul at chromium.org>
> Signed-off-by: Thierry Escande <thierry.escande at collabora.com>
> Reviewed-by: Andrzej Hajda <a.hajda at samsung.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo at collabora.com>
> Tested-by: Marek Szyprowski <m.szyprowski at samsung.com>
> ---
> 
>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 42 +++++++++++++---------
>   1 file changed, 26 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index d76e1652b1fd..37b16643f14c 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -601,7 +601,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>   {
>   	int lane, lane_count, retval;
>   	u32 reg;
> -	u8 link_align, link_status[2], adjust_request[2], spread;
> +	u8 link_align, link_status[2], adjust_request[2];
>   
>   	usleep_range(400, 401);
>   
> @@ -645,20 +645,6 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>   		dev_dbg(dp->dev, "final lane count = %.2x\n",
>   			dp->link_train.lane_count);
>   
> -		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
> -					   &spread);
> -		if (retval != 1) {
> -			dev_err(dp->dev, "failed to read downspread %d\n",
> -				retval);
> -			dp->fast_train_enable = false;
> -		} else {
> -			dp->fast_train_enable =
> -				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
> -					true : false;
> -		}
> -		dev_dbg(dp->dev, "fast link training %s\n",
> -			dp->fast_train_enable ? "supported" : "unsupported");
> -
>   		dp->link_train.lt_state = FINISHED;
>   
>   		return 0;
> @@ -996,6 +982,22 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
>   	return IRQ_HANDLED;
>   }
>   
> +static int analogix_dp_fast_link_train_detection(struct analogix_dp_device *dp)
> +{
> +	int ret;
> +	u8 spread;
> +
> +	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &spread);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to read downspread %d\n", ret);
> +		return ret;
> +	}
> +	dp->fast_train_enable = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
> +	dev_dbg(dp->dev, "fast link training %s\n",
> +		dp->fast_train_enable ? "supported" : "unsupported");
> +	return 0;
> +}
> +
>   static int analogix_dp_commit(struct analogix_dp_device *dp)
>   {
>   	int ret;
> @@ -1038,8 +1040,16 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
>   	if (ret)
>   		return ret;
>   
> -	if (dp->psr_enable)
> +	if (dp->psr_enable) {
>   		ret = analogix_dp_enable_sink_psr(dp);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	/* Check whether panel supports fast training */
> +	ret =  analogix_dp_fast_link_train_detection(dp);
> +	if (ret)
> +		dp->psr_enable = false;
>   
>   	return ret;
>   }
> 



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