[PATCH 6/7] e1000: eliminate duplicate barriers on weakly-ordered archs
Sinan Kaya
okaya at codeaurora.org
Tue Mar 13 20:20:27 PDT 2018
Code includes wmb() followed by writel(). writel() already has a barrier
on some architectures like arm64.
This ends up CPU observing two barriers back to back before executing the
register write.
Since code already has an explicit barrier call, changing writel() to
writel_relaxed().
Signed-off-by: Sinan Kaya <okaya at codeaurora.org>
---
drivers/net/ethernet/intel/e1000/e1000_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c
index 3dd4aeb..e0e583a 100644
--- a/drivers/net/ethernet/intel/e1000/e1000_main.c
+++ b/drivers/net/ethernet/intel/e1000/e1000_main.c
@@ -4573,7 +4573,7 @@ e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
* such as IA-64).
*/
wmb();
- writel(i, adapter->hw.hw_addr + rx_ring->rdt);
+ writel_relaxed(i, adapter->hw.hw_addr + rx_ring->rdt);
}
}
@@ -4688,7 +4688,7 @@ static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
* such as IA-64).
*/
wmb();
- writel(i, hw->hw_addr + rx_ring->rdt);
+ writel_relaxed(i, hw->hw_addr + rx_ring->rdt);
}
}
--
2.7.4
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