[PATCH v2 0/8] ARTPEC-6 ARM SoC device tree updates
Niklas Cassel
niklas.cassel at axis.com
Wed Mar 7 06:40:28 PST 2018
On Tue, Mar 06, 2018 at 05:45:30PM +0100, Arnd Bergmann wrote:
> On Wed, Feb 21, 2018 at 9:59 AM, Niklas Cassel <niklas.cassel at axis.com> wrote:
> > Hello,
> >
> > Here comes some ARTPEC-6 ARM SoC device tree updates.
> >
> > Niklas Cassel (8):
> > ARM: dts: artpec: disable Accelerator Coherency Port
> > ARM: dts: artpec: use 1 GiB RAM
> > ARM: dts: artpec: remove 0x prefix from clkctrl unit address
> > ARM: dts: artpec: migrate ethernet to stmmac binding
> > ARM: dts: artpec: add and utilize artpec6 pin controller
> > ARM: dts: artpec: add and utilize nbpfaxi DMA controllers
> > ARM: dts: artpec: add disabled node for PCIe endpoint mode
> > ARM: dts: artpec: add node for hardware crypto accelerator
>
> For a series eight patches, a pull request would save me some work, but
> I applied it anyway.
Thank you Arnd.
You will receive pull requests in the future.
>
> Are you sure that the first three patches shouldn't be applied to stable
> backports?
The only DTS available upstream is for the ARTPEC-6 devboard.
Considering that ARTPEC-6 devboards are only used in-house,
I don't see a reason to backport anything from this series.
Best regards,
Niklas
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