[PATCH v2 3/8] arm64: zynqmp: Add support for Xilinx zcu102

Michal Simek monstr at monstr.eu
Fri Mar 2 10:39:22 PST 2018


On 2.3.2018 17:48, Rob Herring wrote:
> On Fri, Feb 23, 2018 at 03:40:25PM +0100, Michal Simek wrote:
>> This patch is adding revA, revB and rev1.0. There are also other
>> revisions between which should be backward compatible with previous
>> versions. Unfortunately all revs are still in use.
>>
>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>> ---
>>
>> Changes in v2:
>> - Remove i2c mw u-boot commands
>> - Use i2c-mux instead of i2cswitch
>> - Use clock generator without numbers.
>> - Use dash in node name zcu102 rev1.0
>> - Record compatible string to xilinx.txt
>>
>>  Documentation/devicetree/bindings/arm/xilinx.txt   |   5 +
>>  arch/arm64/boot/dts/xilinx/Makefile                |   3 +
>>  .../arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts |  36 ++
>>  arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts  | 550 +++++++++++++++++++++
>>  arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts  |  42 ++
>>  5 files changed, 636 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
>>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
>>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
> 
> Reviewed-by: Rob Herring <robh at kernel.org> 
> 
> but...
> 
> 
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>> new file mode 100644
>> index 000000000000..ed3cc684931f
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>> @@ -0,0 +1,42 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * dts file for Xilinx ZynqMP ZCU102 RevB
>> + *
>> + * (C) Copyright 2016 - 2018, Xilinx, Inc.
>> + *
>> + * Michal Simek <michal.simek at xilinx.com>
>> + */
>> +
>> +#include "zynqmp-zcu102-revA.dts"
>> +
>> +/ {
>> +	model = "ZynqMP ZCU102 RevB";
>> +	compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
>> +};
>> +
>> +&gem3 {
>> +	phy-handle = <&phyc>;
>> +	phyc: phy at c {
>> +		reg = <0xc>;
>> +		ti,rx-internal-delay = <0x8>;
>> +		ti,tx-internal-delay = <0xa>;
>> +		ti,fifo-depth = <0x1>;
>> +	};
>> +	/* Cleanup from RevA */
>> +	/delete-node/ phy at 21;
>> +};
>> +
>> +/* Different qspi 512Mbit version */
> 
> Stray comment

will remove.

> 
>> +
>> +/* Fix collision with u61 */
>> +&i2c0 {
>> +	i2cswitch at 75 {
> 
> Missed this name.
> 
> This probably creates a new node rather than going into the existing 
> tree. If this compiles, we should fix it to not allow the same 
> unit-address twice.

hmm interesting I didn't see that before I sent this. There is a warning
but not error.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs


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