[PATCH v2 0/6] ARM branch predictor hardening

[Florian Fainelli]

On 01/10/2018 09:16 AM, Marc Zyngier wrote:
> On 10/01/18 16:50, Nishanth Menon wrote:
>> On 01/08/2018 12:55 PM, Marc Zyngier wrote:
>>> This small series implements some basic BP hardening by invalidating
>>> the BTB on CPUs that are known to be susceptible to aliasing attacks.
>>>
>>> These patches are closely modelled against what we do on arm64,
>>> although simpler as we can rely on an architected instruction to
>>> perform the invalidation. The notable exception is Cortex-A15, where
>>> BTB invalidation behaves like a NOP, and the only way to shoot the
>>> predictor down is to invalidate the icache *and* to have ACTLR[0] set
>>> to 1 (which is a secure-only operation).
>>>
>>
>>
>> btw, just wanted to understand if we had any reasons as to why 
>> we'arent tagging these for stable? Yes, I am aware of Greg's comments 
>> in [1], but the v7 series impacts a heck of a lot of existing products 
>> and is not that extensive to cause too much of a pain is it?
>>
>> OR, am I missing some thing else?
>>
>> [1] http://www.kroah.com/log/blog/2018/01/06/meltdown-status/
> 
> This is a work in progress. It is not ready for being merged yet. It can
> be backported to stable after being merged into mainline.

When do you expect to post a v3 of these patches? Happy to test anything
and report back the results. As Russell pointed out earlier, his test
cases against these patches + adding special casing for the Brahma-B15
did not result in any improvement for his "spectre" or "meltdown" test
cases...

Thanks!
-- 
Florian