[PATCH v2 0/6] ARM branch predictor hardening

Nishanth Menon nm at ti.com
Wed Jan 10 08:50:52 PST 2018


On 01/08/2018 12:55 PM, Marc Zyngier wrote:
> This small series implements some basic BP hardening by invalidating
> the BTB on CPUs that are known to be susceptible to aliasing attacks.
> 
> These patches are closely modelled against what we do on arm64,
> although simpler as we can rely on an architected instruction to
> perform the invalidation. The notable exception is Cortex-A15, where
> BTB invalidation behaves like a NOP, and the only way to shoot the
> predictor down is to invalidate the icache *and* to have ACTLR[0] set
> to 1 (which is a secure-only operation).
> 


btw, just wanted to understand if we had any reasons as to why 
we'arent tagging these for stable? Yes, I am aware of Greg's comments 
in [1], but the v7 series impacts a heck of a lot of existing products 
and is not that extensive to cause too much of a pain is it?

OR, am I missing some thing else?

[1] http://www.kroah.com/log/blog/2018/01/06/meltdown-status/

-- 
Regards,
Nishanth Menon



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