[PATCH v2 0/6] ARM branch predictor hardening
Florian Fainelli
f.fainelli at gmail.com
Tue Jan 9 09:13:37 PST 2018
On January 8, 2018 10:55:27 AM PST, Marc Zyngier <marc.zyngier at arm.com> wrote:
>This small series implements some basic BP hardening by invalidating
>the BTB on CPUs that are known to be susceptible to aliasing attacks.
>
>These patches are closely modelled against what we do on arm64,
>although simpler as we can rely on an architected instruction to
>perform the invalidation. The notable exception is Cortex-A15, where
>BTB invalidation behaves like a NOP, and the only way to shoot the
>predictor down is to invalidate the icache *and* to have ACTLR[0] set
>to 1 (which is a secure-only operation).
Is there a publicly available test case/exploit that we could use to regress test this against? I will follow up with the Brahma-B15 patches after you send your v3.
Thanks!
Hi Marc,
--
Florian
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