[PATCH] arm64: cpufeature: Fix CTR_EL0 field definitions

[Catalin Marinas]

On Mon, Feb 19, 2018 at 02:41:44PM +0000, Will Deacon wrote:
> Our field definitions for CTR_EL0 suffer from a number of problems:
> 
>   - The IDC and DIC fields are missing, which causes us to enable CTR
>     trapping on CPUs with either of these returning non-zero values.
> 
>   - The ERG is FTR_LOWER_SAFE, whereas it should be treated like CWG as
>     FTR_HIGHER_SAFE so that applications can use it to avoid false sharing.
> 
>   - [nit] A RES1 field is described as "RAO"
> 
> This patch updates the CTR_EL0 field definitions to fix these issues.
> 
> Cc: <stable at vger.kernel.org>
> Cc: Shanker Donthineni <shankerd at codeaurora.org>
> Signed-off-by: Will Deacon <will.deacon at arm.com>

Queued for -rc3.

-- 
Catalin