[PATCH] drm/sun4i: fix HSYNC and VSYNC polarity

[Maxime Ripard]

On Thu, Feb 15, 2018 at 06:54:48PM +0100, Giulio Benetti wrote:
> Differently from other Lcd signals, HSYNC and VSYNC signals
> result inverted if their bits are cleared to 0.
> 
> Invert their settings of IO_POL register.
> 
> Signed-off-by: Giulio Benetti <giulio.benetti at micronovasrl.com>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
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