[PATCH 1/3] Documentation: dt: socfpga: Add Stratix10 ECC Manager binding

[Dinh Nguyen]

On 04/24/2018 01:35 PM, thor.thayer at linux.intel.com wrote:
> From: Thor Thayer <thor.thayer at linux.intel.com>
> 
> Add the device tree bindings needed to support the Stratix10
> ECC Manager and SDRAM ECC to the existing bindings.
> 
> Signed-off-by: Thor Thayer <thor.thayer at linux.intel.com>
> ---
>  .../bindings/arm/altera/socfpga-eccmgr.txt         | 47 ++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> index 4a1714f96bab..fe48ad293a24 100644
> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> @@ -231,3 +231,50 @@ Example:
>  				     <48 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  	};
> +
> +Stratix10 SoCFPGA ECC Manager
> +The Stratix10 SoC ECC Manager handles the IRQs for each peripheral
> +in a shared register similar to the Arria10. However, ECC requires
> +access to registers that can only be read in EL3 with SMC calls.
> +Therefore the device tree is slightly different.
> +
> +Required Properties:
> +- compatible : Should be "altr,socfpga-s10-ecc-manager"

Altera technically doesn't exist anymore, should this be
"intel,stratix10-ecc-manager"?

Dinh