[PATCH] iommu/arm-smmu-v3: Set GBPA to abort all transactions
Will Deacon
will.deacon at arm.com
Thu Apr 5 04:26:23 PDT 2018
On Wed, Mar 28, 2018 at 09:39:40AM -0500, Timur Tabi wrote:
> From: Sameer Goel <sgoel at codeaurora.org>
>
> Set SMMU_GBPA to abort all incoming translations during the SMMU reset
> when SMMUEN==0.
>
> This prevents a race condition where a stray DMA from the crashed primary
> kernel can try to access an IOVA address as an invalid PA when SMMU is
> disabled during reset in the crash kernel.
>
> Signed-off-by: Sameer Goel <sgoel at codeaurora.org>
> ---
> drivers/iommu/arm-smmu-v3.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 3f2f1fc68b52..c04a89310c59 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2458,6 +2458,18 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
> if (reg & CR0_SMMUEN)
> dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n");
>
> + /*
> + * Abort all incoming translations. This can happen in a kdump case
> + * where SMMU is initialized when a prior DMA is pending. Just
> + * disabling the SMMU in this case might result in writes to invalid
> + * PAs.
> + */
> + ret = arm_smmu_update_gbpa(smmu, 1, GBPA_ABORT);
> + if (ret) {
> + dev_err(smmu->dev, "GBPA not responding to update\n");
> + return ret;
> + }
This needs to be predicated on the disable_bypass option, otherwise I think
it will cause regressions for systems that rely on passthrough.
Will
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