[PATCH 08/22] arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
Simon Horman
horms+renesas at verge.net.au
Fri Sep 29 04:52:17 PDT 2017
From: Geert Uytterhoeven <geert+renesas at glider.be>
Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
Signed-off-by: Simon Horman <horms+renesas at verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a5b769b840e9..84b6bd58eafb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -9,7 +9,7 @@
* kind, whether express or implied.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77995-sysc.h>
@@ -145,7 +145,7 @@
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>,
- <&cpg CPG_CORE 16>,
+ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
--
2.1.4
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