[PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

[Simon Horman]

On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:
> From: Fabrizio Castro <fabrizio.castro at bp.renesas.com>
> 
> Enable the SDHI1 controller on iWave RZ/G1E SoM.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro at bp.renesas.com>
> Signed-off-by: Chris Paterson <chris.paterson2 at renesas.com>
> ---
> This patch is based on renesas-devel-20170913-v4.13.
> 
> 
>  arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
> index e306e7c..f7f9cef 100644
> --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
> +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
> @@ -9,6 +9,7 @@
>   */
>  
>  #include "r8a7745.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>  
>  / {
>  	compatible = "iwave,g22m", "renesas,r8a7745";
> @@ -38,6 +39,12 @@
>  		function = "mmc";
>  	};
>  
> +	sdhi1_pins: sd1 {
> +		groups = "sdhi1_data4", "sdhi1_ctrl";
> +		function = "sdhi1";
> +		power-source = <3300>;
> +	};
> +
>  	i2c3_pins: i2c3 {
>  		groups = "i2c3_b";
>  		function = "i2c3";
> @@ -54,6 +61,16 @@
>  	status = "okay";
>  };
>  
> +&sdhi1 {
> +	pinctrl-0 = <&sdhi1_pins>;
> +	pinctrl-names = "default";
> +
> +	vmmc-supply = <&reg_3p3v>;
> +	vqmmc-supply = <&reg_3p3v>;
> +	cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;

No wp-gpios property means this is a µSD slot, right?

Do you have any plans to enable sdr-50 and sdr-104?
Is it not supported for some reason?

I don't mind if its not enabled in this patch but I would like to
know if it can be enabled or not and reflect that information in the wiki.

http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds

> +	status = "okay";
> +};
> +
>  &i2c3 {
>  	pinctrl-0 = <&i2c3_pins>;
>  	pinctrl-names = "default";
> -- 
> 1.9.1
>