[PATCH v4 1/2] ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2
Kunihiko Hayashi
hayashi.kunihiko at socionext.com
Sun Sep 3 18:16:30 PDT 2017
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor is included in sysctrl.
Furthermore, add cpuN labels for reference in cooling-device property.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko at socionext.com>
---
arch/arm/boot/dts/uniphier-pxs2.dtsi | 43 ++++++++++++++++++++++++++++++++----
1 file changed, 39 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 90b020c..c89e0d5 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -16,7 +16,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu at 0 {
+ cpu0: cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
@@ -24,9 +24,10 @@
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>;
+ #cooling-cells = <2>;
};
- cpu at 1 {
+ cpu1: cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@@ -36,7 +37,7 @@
operating-points-v2 = <&cpu_opp>;
};
- cpu at 2 {
+ cpu2: cpu at 2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
@@ -46,7 +47,7 @@
operating-points-v2 = <&cpu_opp>;
};
- cpu at 3 {
+ cpu3: cpu at 3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
@@ -114,6 +115,34 @@
};
};
+ thermal-zones {
+ cpu_thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu_crit {
+ temperature = <95000>; /* 95C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu_alert {
+ temperature = <85000>; /* 85C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 (-1) (-1)>;
+ };
+ };
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -358,6 +387,12 @@
compatible = "socionext,uniphier-pxs2-reset";
#reset-cells = <1>;
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-pxs2-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ };
};
nand: nand at 68000000 {
--
2.7.4
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