[PATCH] arm64: support __int128 on gcc 5+

[Will Deacon]

On Tue, Oct 31, 2017 at 12:43:19PM +0100, Jason A. Donenfeld wrote:
> Versions of gcc prior to gcc 5 emitted a __multi3 function call when
> dealing with TI types, resulting in failures when trying to link to
> libgcc, and more generally, horrible performance. However, since gcc 5,
> the compiler supports actually emitting fast instructions, which means
> we can at long last enable this option and receive the speedups.
> 
> The gcc commit that added proper Aarch64 support is:
> https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=d1ae7bb994f49316f6f63e6173f2931e837a351d
> 
> This commit appears to be part of the gcc 5 release.
> 
> Signed-off-by: Jason A. Donenfeld <Jason at zx2c4.com>
> ---
>  arch/arm64/Makefile | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
> index 939b310913cf..1f8a0fec6998 100644
> --- a/arch/arm64/Makefile
> +++ b/arch/arm64/Makefile
> @@ -53,6 +53,8 @@ KBUILD_AFLAGS	+= $(lseinstr) $(brokengasinst)
>  KBUILD_CFLAGS	+= $(call cc-option,-mabi=lp64)
>  KBUILD_AFLAGS	+= $(call cc-option,-mabi=lp64)
>  
> +KBUILD_CFLAGS	+= $(call cc-ifversion, -ge, 0500, -DCONFIG_ARCH_SUPPORTS_INT128)
> +
>  ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
>  KBUILD_CPPFLAGS	+= -mbig-endian
>  CHECKFLAGS	+= -D__AARCH64EB__

Which code in the kernel actually uses 128-bit types directly? I know we
have some unfortunate occurences in our headers (including uapi) for the
vector registers, but I thought we generally used asm or copy routines to
access those.

Are you seeing a performance issue without this?

Will