[PATCH v4 16/28] arm64/sve: Probe SVE capabilities and usable vector lengths

[Catalin Marinas]

On Fri, Oct 27, 2017 at 11:50:58AM +0100, Dave P Martin wrote:
> This patch uses the cpufeatures framework to determine common SVE
> capabilities and vector lengths, and configures the runtime SVE
> support code appropriately.
> 
> ZCR_ELx is not really a feature register, but it is convenient to
> use it as a template for recording the maximum vector length
> supported by a CPU, using the LEN field.  This field is similar to
> a feature field in that it is a contiguous bitfield for which we
> want to determine the minimum system-wide value.  This patch adds
> ZCR as a pseudo-register in cpuinfo/cpufeatures, with appropriate
> custom code to populate it.  Finding the minimum supported value of
> the LEN field is left to the cpufeatures framework in the usual
> way.
> 
> The meaning of ID_AA64ZFR0_EL1 is not architecturally defined yet,
> so for now we just require it to be zero.
> 
> Note that much of this code is dormant and SVE still won't be used
> yet, since system_supports_sve() remains hardwired to false.
> 
> Signed-off-by: Dave Martin <Dave.Martin at arm.com>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose at arm.com>
> Cc: Alex Bennée <alex.bennee at linaro.org>
> Cc: Catalin Marinas <catalin.marinas at arm.com>

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>