[PATCH] phy: add combo phy driver for HiSilicon STB SoCs

[Rob Herring]

On Tue, Oct 24, 2017 at 10:12 AM, Shawn Guo <shawnguo at kernel.org> wrote:
> On Tue, Oct 24, 2017 at 02:41:09PM +0800, Shawn Guo wrote:
>> > > +HiSilicon STB PCIE/SATA/USB3 PHY
>> > > +
>> > > +Properties:
>> > > +- compatible: Should be "hisilicon,hi3798cv200-combphy"
>> > > +- #phy-cells: Should be 1.  The cell number is used to select the phy mode:
>> > > + 0: PCIe mode
>> > > + 1: USB 3.0 mode
>> > > + 2: SATA mode
>> > > +- clocks: The phandle to clock provider and clock specifier pair.
>> > > +- resets: The phandle to reset controller and reset specifier pair.
>> > > +- hisilicon,peripheral-syscon: The phandle to the peripheral controller.
>> >
>> > Could just be a child of the syscon instead?
>>
>> It should be doable, but I do not fully understand the benefits of doing
>> that.
>
> Okay, I see that having it be child of syscon can save us this
> hisilicon,peripheral-syscon property, as the parent will just be the
> syscon device.  Also, if there is any register space only for phy
> device, we can define them as regular 'reg' property.

Yes, exactly.

Rob