n900 in next-20170901

[Tony Lindgren]

* Tony Lindgren <tony at atomide.com> [171110 07:36]:
> * Joonsoo Kim <iamjoonsoo.kim at lge.com> [171110 06:34]:
> > On Thu, Nov 09, 2017 at 07:26:10PM -0800, Tony Lindgren wrote:
> > > +#define OMAP34XX_SRAM_PHYS	0x40200000
> > > +#define OMAP34XX_SRAM_VIRT	0xd0010000
> > > +#define OMAP34XX_SRAM_SIZE	0x10000
> > 
> > For my testing environment, vmalloc address space is started at
> > roughly 0xe0000000 so 0xd0010000 would not be valid.
> 
> Well we can map it anywhere we want, got any preferences?

Hmm and I'm also wondering what you do to make vmalloc space to
start at 0xe0000000 instead of 0xd0000000?

The reason I'm asking is because I think we can just move all of
save_secure_ram_context to run from DDR instead of SRAM. But I'd
rather do a minimal patch first that fixes your series and then we
can test the further changes with more time.

After moving save_secure_ram_context to DDR, we can call
save_secure_ram_context directly with something like:

	args_pa = __pa(omap3_secure_ram_storage);
	offset = (unsigned long)omap3_secure_ram_storage - args_pa;
	ret = save_secure_ram_context(args_pa, offset);

> Just that the current save_secure_ram_context uses "high_mask"
> of 0xffff to translate the address. To make this more flexible,
> we need the save_secure_ram_context changes too. So we might
> want to do the static mapping and save_secure_ram_context changes
> as a single patch.
> 
> > And, PHYS can be different according to the system type. Maybe either
> > OMAP3_SRAM_PUB_PA or OMAP3_SRAM_PA. It seems that SIZE and TYPE should
> > be considered, too. My understanding is correct?
> 
> We can have a static map for the whole SRAM area, see function
> __arm_ioremap_pfn_caller() for the comment "Try to reuse one of the
> static mapping whenever possible". So the different public SRAM start
> addresses and sizes don't matter there.

And then if save_secure_ram_contet runs in DDR, no static map is
needed.

Regards,

Tony