PROBLEM: ARM Cache policy on single armv7 processor lead to low DRAM performance
Russell King - ARM Linux
linux at armlinux.org.uk
Tue May 16 01:29:22 PDT 2017
On Tue, May 16, 2017 at 11:59:30AM +0800, Zhao Yibin wrote:
> We met some DDR performance issue caused by armv7 cache policy, hope you
> can help.
> On a single armv7(Cortex-A7) processor system, the arm linux kernel,
> without CONFIG_SMP, the cache policy is set to write-back no-allocate,
It should be write-back read-allocate.
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