[PATCH v2 04/11] ARM: at91: pm: Use struct at91_pm_data in pm_suspend.S

Wenyou.Yang at microchip.com Wenyou.Yang at microchip.com
Tue Mar 28 21:52:54 PDT 2017



> -----Original Message-----
> From: Alexandre Belloni [mailto:alexandre.belloni at free-electrons.com]
> Sent: 2017年3月28日 19:20
> To: Nicolas Ferre - M43238 <Nicolas.Ferre at microchip.com>
> Cc: linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Boris
> Brezillon <boris.brezillon at free-electrons.com>; Wenyou Yang - A41535
> <Wenyou.Yang at microchip.com>; Alexandre Belloni <alexandre.belloni at free-
> electrons.com>
> Subject: [PATCH v2 04/11] ARM: at91: pm: Use struct at91_pm_data in
> pm_suspend.S
> 
> The number of register we can safely pass to at91_pm_suspend_in_sram is
> limited. Instead, pass the address to the at91_pm_data structure.
> 
> The offsets are automatically generated to avoid hardcoding them.
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni at free-electrons.com>

Acked-by: Wenyou Yang <wenyou.yang at atmel.com>

> ---
>  arch/arm/mach-at91/Makefile          | 33 +++++++++++++++
>  arch/arm/mach-at91/pm.c              | 78 +++++++++++++++---------------------
>  arch/arm/mach-at91/pm.h              | 16 +++++---
>  arch/arm/mach-at91/pm_data-offsets.c | 13 ++++++
>  arch/arm/mach-at91/pm_suspend.S      | 29 ++++++--------
>  5 files changed, 102 insertions(+), 67 deletions(-)  create mode 100644
> arch/arm/mach-at91/pm_data-offsets.c
> 
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index
> c5bbf8bb8c0f..858ef14f961c 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -18,3 +18,36 @@ endif
>  ifeq ($(CONFIG_PM_DEBUG),y)
>  CFLAGS_pm.o += -DDEBUG
>  endif
> +
> +# Default sed regexp - multiline due to syntax constraints define sed-y
> +	"/^->/{s:->#\(.*\):/* \1 */:; \
> +	s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
> +	s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
> +	s:->::; p;}"
> +endef
> +
> +# Use filechk to avoid rebuilds when a header changes, but the
> +resulting file # does not define filechk_offsets
> +	(set -e; \
> +	 echo "#ifndef $2"; \
> +	 echo "#define $2"; \
> +	 echo "/*"; \
> +	 echo " * DO NOT MODIFY."; \
> +	 echo " *"; \
> +	 echo " * This file was generated by Kbuild"; \
> +	 echo " */"; \
> +	 echo ""; \
> +	 sed -ne $(sed-y); \
> +	 echo ""; \
> +	 echo "#endif" )
> +endef
> +
> +arch/arm/mach-at91/pm_data-offsets.s: arch/arm/mach-at91/pm_data-offsets.c
> +	$(call if_changed_dep,cc_s_c)
> +
> +include/generated/at91_pm_data-offsets.h: arch/arm/mach-at91/pm_data-
> offsets.s FORCE
> +	$(call filechk,offsets,__PM_DATA_OFFSETS_H__)
> +
> +arch/arm/mach-at91/pm_suspend.o:
> +include/generated/at91_pm_data-offsets.h
> diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index
> c780dda3b604..a35b1541b328 100644
> --- a/arch/arm/mach-at91/pm.c
> +++ b/arch/arm/mach-at91/pm.c
> @@ -37,18 +37,13 @@ extern void at91_pinctrl_gpio_suspend(void);  extern void
> at91_pinctrl_gpio_resume(void);  #endif
> 
> -static struct {
> -	void __iomem *pmc;
> -	void __iomem *ramc[2];
> -	unsigned long uhp_udp_mask;
> -	int memctrl;
> -} at91_pm_data;
> +static struct at91_pm_data pm_data;
> 
>  #define at91_ramc_read(id, field) \
> -	__raw_readl(at91_pm_data.ramc[id] + field)
> +	__raw_readl(pm_data.ramc[id] + field)
> 
>  #define at91_ramc_write(id, field, value) \
> -	__raw_writel(value, at91_pm_data.ramc[id] + field)
> +	__raw_writel(value, pm_data.ramc[id] + field)
> 
>  static int at91_pm_valid_state(suspend_state_t state)  { @@ -84,10 +79,10 @@
> static int at91_pm_verify_clocks(void)
>  	unsigned long scsr;
>  	int i;
> 
> -	scsr = readl(at91_pm_data.pmc + AT91_PMC_SCSR);
> +	scsr = readl(pm_data.pmc + AT91_PMC_SCSR);
> 
>  	/* USB must not be using PLLB */
> -	if ((scsr & at91_pm_data.uhp_udp_mask) != 0) {
> +	if ((scsr & pm_data.uhp_udp_mask) != 0) {
>  		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
>  		return 0;
>  	}
> @@ -98,7 +93,7 @@ static int at91_pm_verify_clocks(void)
> 
>  		if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
>  			continue;
> -		css = readl(at91_pm_data.pmc + AT91_PMC_PCKR(i)) &
> AT91_PMC_CSS;
> +		css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) &
> AT91_PMC_CSS;
>  		if (css != AT91_PMC_CSS_SLOW) {
>  			pr_err("AT91: PM - Suspend-to-RAM with PCK%d
> src %d\n", i, css);
>  			return 0;
> @@ -124,25 +119,18 @@ int at91_suspend_entering_slow_clock(void)
>  }
>  EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
> 
> -static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0,
> -			  void __iomem *ramc1, int memctrl);
> -
> -extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem
> *ramc0,
> -			    void __iomem *ramc1, int memctrl);
> +static void (*at91_suspend_sram_fn)(struct at91_pm_data *); extern void
> +at91_pm_suspend_in_sram(struct at91_pm_data *pm_data);
>  extern u32 at91_pm_suspend_in_sram_sz;
> 
>  static void at91_pm_suspend(suspend_state_t state)  {
> -	unsigned int pm_data = at91_pm_data.memctrl;
> -
> -	pm_data |= (state == PM_SUSPEND_MEM) ?
> -				AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0;
> +	pm_data.mode = (state == PM_SUSPEND_MEM) ?
> AT91_PM_SLOW_CLOCK : 0;
> 
>  	flush_cache_all();
>  	outer_disable();
> 
> -	at91_suspend_sram_fn(at91_pm_data.pmc, at91_pm_data.ramc[0],
> -			     at91_pm_data.ramc[1], pm_data);
> +	at91_suspend_sram_fn(&pm_data);
> 
>  	outer_resume();
>  }
> @@ -245,7 +233,7 @@ static void at91rm9200_standby(void)
>  		"    mcr    p15, 0, %0, c7, c0, 4\n\t"
>  		"    str    %5, [%1, %2]"
>  		:
> -		: "r" (0), "r" (at91_pm_data.ramc[0]), "r"
> (AT91_MC_SDRAMC_LPR),
> +		: "r" (0), "r" (pm_data.ramc[0]), "r" (AT91_MC_SDRAMC_LPR),
>  		  "r" (1), "r" (AT91_MC_SDRAMC_SRR),
>  		  "r" (lpr));
>  }
> @@ -260,7 +248,7 @@ static void at91_ddr_standby(void)
>  	u32 lpr0, lpr1 = 0;
>  	u32 saved_lpr0, saved_lpr1 = 0;
> 
> -	if (at91_pm_data.ramc[1]) {
> +	if (pm_data.ramc[1]) {
>  		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
>  		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
>  		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; @@ -272,13
> +260,13 @@ static void at91_ddr_standby(void)
> 
>  	/* self-refresh mode now */
>  	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
> -	if (at91_pm_data.ramc[1])
> +	if (pm_data.ramc[1])
>  		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
> 
>  	cpu_do_idle();
> 
>  	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
> -	if (at91_pm_data.ramc[1])
> +	if (pm_data.ramc[1])
>  		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);  }
> 
> @@ -306,7 +294,7 @@ static void at91sam9_sdram_standby(void)
>  	u32 lpr0, lpr1 = 0;
>  	u32 saved_lpr0, saved_lpr1 = 0;
> 
> -	if (at91_pm_data.ramc[1]) {
> +	if (pm_data.ramc[1]) {
>  		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
>  		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
>  		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; @@ -318,13
> +306,13 @@ static void at91sam9_sdram_standby(void)
> 
>  	/* self-refresh mode now */
>  	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
> -	if (at91_pm_data.ramc[1])
> +	if (pm_data.ramc[1])
>  		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
> 
>  	cpu_do_idle();
> 
>  	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
> -	if (at91_pm_data.ramc[1])
> +	if (pm_data.ramc[1])
>  		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);  }
> 
> @@ -344,8 +332,8 @@ static __init void at91_dt_ramc(void)
>  	const void *standby = NULL;
> 
>  	for_each_matching_node_and_match(np, ramc_ids, &of_id) {
> -		at91_pm_data.ramc[idx] = of_iomap(np, 0);
> -		if (!at91_pm_data.ramc[idx])
> +		pm_data.ramc[idx] = of_iomap(np, 0);
> +		if (!pm_data.ramc[idx])
>  			panic(pr_fmt("unable to map ramc[%d] cpu registers\n"),
> idx);
> 
>  		if (!standby)
> @@ -371,12 +359,12 @@ static void at91rm9200_idle(void)
>  	 * Disable the processor clock.  The processor will be automatically
>  	 * re-enabled by an interrupt or by a reset.
>  	 */
> -	writel(AT91_PMC_PCK, at91_pm_data.pmc + AT91_PMC_SCDR);
> +	writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
>  }
> 
>  static void at91sam9_idle(void)
>  {
> -	writel(AT91_PMC_PCK, at91_pm_data.pmc + AT91_PMC_SCDR);
> +	writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
>  	cpu_do_idle();
>  }
> 
> @@ -445,8 +433,8 @@ static void __init at91_pm_init(void (*pm_idle)(void))
>  		platform_device_register(&at91_cpuidle_device);
> 
>  	pmc_np = of_find_matching_node(NULL, atmel_pmc_ids);
> -	at91_pm_data.pmc = of_iomap(pmc_np, 0);
> -	if (!at91_pm_data.pmc) {
> +	pm_data.pmc = of_iomap(pmc_np, 0);
> +	if (!pm_data.pmc) {
>  		pr_err("AT91: PM not supported, PMC not found\n");
>  		return;
>  	}
> @@ -471,8 +459,8 @@ void __init at91rm9200_pm_init(void)
>  	 */
>  	at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
> 
> -	at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
> AT91RM9200_PMC_UDP;
> -	at91_pm_data.memctrl = AT91_MEMCTRL_MC;
> +	pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
> AT91RM9200_PMC_UDP;
> +	pm_data.memctrl = AT91_MEMCTRL_MC;
> 
>  	at91_pm_init(at91rm9200_idle);
>  }
> @@ -480,31 +468,31 @@ void __init at91rm9200_pm_init(void)  void __init
> at91sam9260_pm_init(void)  {
>  	at91_dt_ramc();
> -	at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
> -	at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
> +	pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
> +	pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
>  	at91_pm_init(at91sam9_idle);
>  }
> 
>  void __init at91sam9g45_pm_init(void)
>  {
>  	at91_dt_ramc();
> -	at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
> -	at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
> +	pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
> +	pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
>  	at91_pm_init(at91sam9_idle);
>  }
> 
>  void __init at91sam9x5_pm_init(void)
>  {
>  	at91_dt_ramc();
> -	at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
> -	at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
> +	pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
> +	pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
>  	at91_pm_init(at91sam9_idle);
>  }
> 
>  void __init sama5_pm_init(void)
>  {
>  	at91_dt_ramc();
> -	at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
> -	at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
> +	pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
> AT91SAM926x_PMC_UDP;
> +	pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
>  	at91_pm_init(NULL);
>  }
> diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index
> 8eed156ef19a..fc0f7d048187 100644
> --- a/arch/arm/mach-at91/pm.h
> +++ b/arch/arm/mach-at91/pm.h
> @@ -21,12 +21,16 @@
>  #define AT91_MEMCTRL_SDRAMC	1
>  #define AT91_MEMCTRL_DDRSDR	2
> 
> -#define	AT91_PM_MEMTYPE_MASK	0x0f
> -
> -#define	AT91_PM_MODE_OFFSET	4
> -#define	AT91_PM_MODE_MASK	0x01
> -#define	AT91_PM_MODE(x)		(((x) & AT91_PM_MODE_MASK)
> << AT91_PM_MODE_OFFSET)
> -
>  #define	AT91_PM_SLOW_CLOCK	0x01
> 
> +#ifndef __ASSEMBLY__
> +struct at91_pm_data {
> +	void __iomem *pmc;
> +	void __iomem *ramc[2];
> +	unsigned long uhp_udp_mask;
> +	unsigned int memctrl;
> +	unsigned int mode;
> +};
> +#endif
> +
>  #endif
> diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-
> offsets.c
> new file mode 100644
> index 000000000000..30302cb16df0
> --- /dev/null
> +++ b/arch/arm/mach-at91/pm_data-offsets.c
> @@ -0,0 +1,13 @@
> +#include <linux/stddef.h>
> +#include <linux/kbuild.h>
> +#include "pm.h"
> +
> +int main(void)
> +{
> +	DEFINE(PM_DATA_PMC,		offsetof(struct at91_pm_data,
> pmc));
> +	DEFINE(PM_DATA_RAMC0,		offsetof(struct at91_pm_data,
> ramc[0]));
> +	DEFINE(PM_DATA_RAMC1,		offsetof(struct at91_pm_data,
> ramc[1]));
> +	DEFINE(PM_DATA_MEMCTRL,	offsetof(struct at91_pm_data,
> memctrl));
> +	DEFINE(PM_DATA_MODE,		offsetof(struct at91_pm_data,
> mode));
> +	return 0;
> +}
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-
> at91/pm_suspend.S index a25defda3d22..ed317657e760 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
> @@ -14,6 +14,7 @@
>  #include <linux/linkage.h>
>  #include <linux/clk/at91_pmc.h>
>  #include "pm.h"
> +#include "generated/at91_pm_data-offsets.h"
> 
>  #define	SRAMC_SELF_FRESH_ACTIVE		0x01
>  #define	SRAMC_SELF_FRESH_EXIT		0x00
> @@ -72,13 +73,9 @@ tmp2	.req	r5
>  	.arm
> 
>  /*
> - * void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *sdramc,
> - *			void __iomem *ramc1, int memctrl)
> + * void at91_suspend_sram_fn(struct at91_pm_data*)
>   * @input param:
> - * 	@r0: base address of AT91_PMC
> - *  	@r1: base address of SDRAM Controller (SDRAM, DDRSDR, or
> AT91_SYS)
> - *	@r2: base address of second SDRAM Controller or 0 if not present
> - *	@r3: pm information
> + * 	@r0: base address of struct at91_pm_data
>   */
>  /* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of
> fncpy() */
>  	.align 3
> @@ -90,16 +87,16 @@ ENTRY(at91_pm_suspend_in_sram)
>  	mov	tmp1, #0
>  	mcr	p15, 0, tmp1, c7, c10, 4
> 
> -	str	r0, .pmc_base
> -	str	r1, .sramc_base
> -	str	r2, .sramc1_base
> -
> -	and	r0, r3, #AT91_PM_MEMTYPE_MASK
> -	str	r0, .memtype
> -
> -	lsr	r0, r3, #AT91_PM_MODE_OFFSET
> -	and	r0, r0, #AT91_PM_MODE_MASK
> -	str	r0, .pm_mode
> +	ldr	tmp1, [r0, #PM_DATA_PMC]
> +	str	tmp1, .pmc_base
> +	ldr	tmp1, [r0, #PM_DATA_RAMC0]
> +	str	tmp1, .sramc_base
> +	ldr	tmp1, [r0, #PM_DATA_RAMC1]
> +	str	tmp1, .sramc1_base
> +	ldr	tmp1, [r0, #PM_DATA_MEMCTRL]
> +	str	tmp1, .memtype
> +	ldr	tmp1, [r0, #PM_DATA_MODE]
> +	str	tmp1, .pm_mode
> 
>  	/* Active the self-refresh mode */
>  	mov	r0, #SRAMC_SELF_FRESH_ACTIVE
> --
> 2.11.0



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