[PATCH 1/3] clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocks

[Jun Nie]

2017-03-21 16:38 GMT+08:00 Shawn Guo <shawnguo at kernel.org>:
> From: Shawn Guo <shawn.guo at linaro.org>
>
> To support VOU VGA display driver with different modes, we need to set
> flag for a few clocks, so that clk_set_rate() call in VOU driver can get
> VGA device desired pixel rate.
>
> While at it, the divider between pll_vga and clk_vga gets corrected, as
> it's 1:1 instead of 1:2.
>
> Signed-off-by: Shawn Guo <shawn.guo at linaro.org>

Reviewed-by: Jun Nie <jun.nie at linaro.org>