Neophyte questions about PCIe
Mason
slash.tmp at free.fr
Tue Mar 14 08:54:00 PDT 2017
On 14/03/2017 15:00, Mason wrote:
> On 10/03/2017 18:49, Mason wrote:
>
>> /* Root complex reports incorrect device class */
>> static void tango_pcie_fixup_class(struct pci_dev *dev)
>> {
>> dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>> }
>
> Gen1 controller reports class/rev = 0x04800001
> Gen2 controller reports class/rev = 0x06000001
>
> #define PCI_CLASS_BRIDGE_HOST 0x0600
> #define PCI_CLASS_BRIDGE_ISA 0x0601
> #define PCI_CLASS_BRIDGE_EISA 0x0602
> #define PCI_CLASS_BRIDGE_MC 0x0603
> #define PCI_CLASS_BRIDGE_PCI 0x0604
> #define PCI_CLASS_BRIDGE_PCMCIA 0x0605
> #define PCI_CLASS_BRIDGE_NUBUS 0x0606
> #define PCI_CLASS_BRIDGE_CARDBUS 0x0607
> #define PCI_CLASS_BRIDGE_RACEWAY 0x0608
> #define PCI_CLASS_BRIDGE_OTHER 0x0680
>
> My fixup replaces 0x048000 with 0x060400.
>
> 0x060400 != 0x060000
>
> Which is correct:
> PCI_CLASS_BRIDGE_HOST or PCI_CLASS_BRIDGE_PCI?
>
> Naively, I would expect Host/PCI bridge to be more correct
> for a root complex.
But that's very likely wrong, since the code in Linux does:
switch (dev->hdr_type) { /* header type */
case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
if (class != PCI_CLASS_BRIDGE_PCI)
goto bad;
/* The PCI-to-PCI bridge spec requires that subtractive
decoding (i.e. transparent) bridge must have programming
interface code of 0x01. */
So a class of PCI_CLASS_BRIDGE_HOST would error out, I think.
Does this mean I need to fixup Gen2 as well?
(Since it reports 0x060000)
Regards.
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