Legacy features in PCI Express devices

[Mason]

On 13/03/2017 18:12, Robin Murphy wrote:

> On 13/03/17 16:10, Mason wrote:
>
>> There are two revisions of our PCI Express controller.
>>
>> Rev 1 did not support the following features:
>>
>>   1) legacy PCI interrupt delivery (INTx signals)
>>   2) I/O address space
>>
>> Internally, someone stated that such missing support would prevent
>> some PCIe cards from working with our controller.
>>
>> Are there really modern PCIe cards that require 1) and/or 2)
>> to function?
>>
>> Can someone provide examples of such cards, so that I may test them
>> on both revisions?
>>
>> I was told to check ath9k-based cards. Any other examples?
>>
>> Looking around, I came across this thread:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/418254.html
>> "i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity"
>>
>> IIUC, although some PCIe boards do support MSI, the driver might not
>> put in the work to use that infrastructure, and instead reverts to
>> legacy interrupts. (So it is a SW issue, in a sense.)
> 
> Secondary to that category is endpoints which nominally support MSI, but
> in a way which is unreliable or otherwise broken. My experience shows
> that the Silicon Image SiI 3132 (as integrated on ARM Juno boards, but
> seemingly also relatively common on 'generic' 2-port SATA cards) falls
> into that category - using the command-line parameter to force MSIs
> instead of legacy interrupts leads to the the machine barely reaching
> userspace before something goes horribly wrong:

Do drivers typically support *both* MSI and INTx?

Specifically, would the xhci driver support both?

If I remove MSI support from my kernel, I might be able to test
legacy interrupt support that way, right?

Regards.