Neophyte questions about PCIe
Mason
slash.tmp at free.fr
Mon Mar 13 07:25:04 PDT 2017
On 10/03/2017 18:49, Mason wrote:
> # /usr/sbin/lspci -v
> 00:00.0 PCI bridge: Sigma Designs, Inc. Device 0024 (rev 01) (prog-if 00 [Normal decode])
> Flags: bus master, fast devsel, latency 0
> Memory at <ignored> (64-bit, non-prefetchable)
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 04000000-040fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Capabilities: [50] MSI: Enable+ Count=1/4 Maskable- 64bit+
> Capabilities: [78] Power Management version 3
> Capabilities: [80] Express Root Port (Slot-), MSI 03
> Capabilities: [100] Virtual Channel
> Capabilities: [800] Advanced Error Reporting
> Kernel driver in use: pcieport
>
> Still some weirdness here.
> I might be using too old a version: lspci version 3.2.1
Focusing on the unexpected reports of stuff "behind bridge".
The output from pciutils 3.5.4 is mostly identical.
Is this likely to cause issues down the road?
# /usr/sbin/lspci -v
00:00.0 PCI bridge: Sigma Designs, Inc. Device 0024 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 25
Memory at <ignored> (64-bit, non-prefetchable)
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 00000000-00000fff [size=4K]
Memory behind bridge: 04000000-040fffff [size=1M]
Prefetchable memory behind bridge: 00000000-000fffff [size=1M]
Capabilities: [50] MSI: Enable+ Count=1/4 Maskable- 64bit+
Capabilities: [78] Power Management version 3
Capabilities: [80] Express Root Port (Slot-), MSI 03
Capabilities: [100] Virtual Channel
Capabilities: [800] Advanced Error Reporting
Kernel driver in use: pcieport
Regards.
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