Using the generic host PCIe driver

Mason slash.tmp at free.fr
Fri Mar 3 03:26:27 PST 2017


On 01/03/2017 17:36, Marc Zyngier wrote:

> Mason: while the kernel has generic support for dealing with MSI, there
> is not standardization at the interrupt controller level, so you do have
> to write your own driver, and wire it in the rest of the framework.
> 
> I suggest you look at things like drivers/pci/host/pcie-altera-msi.c,
> which has an extremely simple implementation. You can use this as a
> starting point for your own driver.

Thanks Marc,

I'll have a close look at the Altera driver.

I'm having a hard time understanding 3 different kinds of interrupts:

  1. MSI (message-signalled interrupts)
  2. legacy interrupts
  3. custom interrupts

I mostly understand MSI. When a device needs attention from the CPU,
it sends a specific packet over the PCIe data link to a specific
PCI bus address, which the PCIe controller knows to interpret as
an interrupt request, so it raises the appropriate signal to
interrupt the CPU.

Legacy interrupts are the old-style PCI interrupts, when a device
expects to have an actual physical interrupt line to the PCI
controller, correct? The controller then forwards the interrupt
request to the CPU, as with MSIs.

Custom interrupts, I'm not sure. Here's the list:

system_error : indicates that the interrupt is triggered by a system error, signaled by the lower layers.
dma_rd_int : interrupt is triggered by DMA read availability.
dma_wr_int : interrupt is triggered by DMA write availability.
cpl_ur : interrupt is triggered by unsupported completion request.
cpl_crs : interrupt is triggered by configuration request retry status.
cpl_ca : interrupt is triggered by completer abort event.
cpl_timeout : interrupt is triggered by a completion timeout event.
pci_intx : one of selected legacy interrupts INTx is triggered. 

Notes:

It appears that legacy interrupts are supported through this
custom register.

I think I might be able to ignore DMA for the time being.

cpl_* interrupts look somewhat standard, yet the PCI framework
cannot know they exist, since they are in some random MMIO register.
I'm confused about these and system_error. I guess I can ignore
them at first, or just print a message when they trigger, to try
to figure out what to do with them.


I suppose the interrupt controller I'm supposed to write needs
to handle all 3 types of interrupts?

Regards.



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