[PATCH] ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
Gregory CLEMENT
gregory.clement at free-electrons.com
Fri Jun 23 05:45:48 PDT 2017
Hi Marc,
On mer., juin 21 2017, Marc Zyngier <marc.zyngier at arm.com> wrote:
> Contrary to popular belief, PPIs connected to a GICv3 to not have
> an affinity field similar to that of GICv2. That is consistent
> with the fact that GICv3 is designed to accomodate thousands of
> CPUs, and fitting them as a bitmap in a byte is... difficult.
>
> Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
Applied on mvebu/fixes
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index 4d495ec39202..bc179efb10ef 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -75,14 +75,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13
> - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
> - <GIC_PPI 14
> - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
> - <GIC_PPI 11
> - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
> - <GIC_PPI 10
> - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> soc {
> --
> 2.11.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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