[PATCH v4 6/7] ARM: dts: meson8: switch to new bindings for UART nodes

[Neil Armstrong]

On 06/11/2017 10:18 PM, Martin Blumenstingl wrote:
> On Sat, Jun 10, 2017 at 12:37 AM, Martin Blumenstingl
> <martin.blumenstingl at googlemail.com> wrote:
>> Hi Neil,
>>
>> On Fri, Jun 9, 2017 at 11:49 AM, Neil Armstrong <narmstrong at baylibre.com> wrote:
>>> Switch to the stable UART bindings by adding a XTAL node and using the
>>> proper compatible strings.
>> unfortunately this won't apply now that Kevin has merged my "ARM: dts:
>> meson8: add and use the real clock controller"
>> on the other hand this will make the patch easier as you can now do
>> the same changes as in meson8b.dtsi
> Neil, if you want you could also drop this from your series and let me
> handle this (just let me know). I would even go one step further and
> export the CLKID_UART0, CLKID_UART1 and CLKID_UART2 gates and pass
> them as "pclk" for uart_{A,B,C}
> I'll even *try* to test if this works on real hardware (my Meson8m2
> board has a RTL8723BS SDIO wifi + bluetooth chip - wifi driver support
> has been pretty bad so far - but I'll try to see if I can get and
> messages out of the bluetooth part)
> just let me know if you want me to handle this patch for you


No in fact it was just a "PoC" to show how to handle it on non-gx DTS.

I'm ok to leave it to you when the UART code is merged.

Neil

> 
>>> Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
>>> ---
>>>  arch/arm/boot/dts/meson8.dtsi | 23 +++++++++++++++++++----
>>>  1 file changed, 19 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
>>> index 6993077..a2ea112 100644
>>> --- a/arch/arm/boot/dts/meson8.dtsi
>>> +++ b/arch/arm/boot/dts/meson8.dtsi
>>> @@ -83,6 +83,13 @@
>>>                 };
>>>         };
>>>
>>> +       xtal: xtal-clk {
>>> +               compatible = "fixed-clock";
>>> +               clock-frequency = <24000000>;
>>> +               clock-output-names = "xtal";
>>> +               #clock-cells = <0>;
>>> +       };
>>> +
>>>         clk81: clk at 0 {
>>>                 #clock-cells = <0>;
>>>                 compatible = "fixed-clock";
>>> @@ -199,17 +206,25 @@
>>>  };
>>>
>>>  &uart_AO {
>>> -       clocks = <&clk81>;
>>> +       compatible = "amlogic,meson8-uart", "amlogic,meson-ao-uart";
>>> +       clocks = <&xtal>, <&clk81>, <&clk81>;
>>> +       clock-names = "xtal", "pclk", "baud";
>>>  };
>>>
>>>  &uart_A {
>>> -       clocks = <&clk81>;
>>> +       compatible = "amlogic,meson8-uart";
>>> +       clocks = <&xtal>, <&clk81>, <&clk81>;
>>> +       clock-names = "xtal", "pclk", "baud";
>>>  };
>>>
>>>  &uart_B {
>>> -       clocks = <&clk81>;
>>> +       compatible = "amlogic,meson8-uart";
>>> +       clocks = <&xtal>, <&clk81>, <&clk81>;
>>> +       clock-names = "xtal", "pclk", "baud";
>>>  };
>>>
>>>  &uart_C {
>>> -       clocks = <&clk81>;
>>> +       compatible = "amlogic,meson8-uart";
>>> +       clocks = <&xtal>, <&clk81>, <&clk81>;
>>> +       clock-names = "xtal", "pclk", "baud";
>>>  };
>>> --
>>> 1.9.1
>>>
>>>
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