[PATCH v2 2/6] dt-bindings: interrupt-controller: add DT binding for the Marvell ICU

[Rob Herring]

On Thu, Jun 08, 2017 at 02:12:02PM +0200, Thomas Petazzoni wrote:
> Hello,
> 
> On Wed, 7 Jun 2017 17:33:17 -0500, Rob Herring wrote:
> 
> > > +Example:
> > > +
> > > +icu: interrupt-controller at 1e0000 {
> > > +	compatible = "marvell,cp110-icu";
> > > +	reg = <0x1e0000 0x10>;
> > > +	#interrupt-cells = <3>;
> > > +	interrupt-controller;
> > > +	interrupt-parent = <&gic>;  
> > 
> > If you have a parent, then you should have some interrupts. I guess that 
> > would be your ranges property? I suppose that is fine.
> 
> The ranges of interrupts available is defined by the gicp node. Indeed,
> as explained in the cover letter:
> 
>  - We have one GICP in the SoC, providing a number of GIC SPI interrupts
> 
>  - We have one ICU per CP in the SoC. So for example in the Armada 8K,
>    we have two CPs, and therefore two ICUs.
> 
> So the range of available GIC SPI interrupts it not associated to each
> ICU, it's a global range of GIC SPI interrupts: each can freely be
> allocated by any of the ICUs in the system.

Okay, I guess I have no issues with this one.

Acked-by: Rob Herring <robh at kernel.org>