[PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.

[Baruch Siach]

Hi Yong,

On Mon, Jul 31, 2017 at 09:48:06AM +0800, Yong wrote:
> On Sun, 30 Jul 2017 09:08:01 +0300
> Baruch Siach <baruch at tkos.co.il> wrote:
> > On Fri, Jul 28, 2017 at 06:02:33PM +0200, Maxime Ripard wrote:
> > > On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> > > > +	regmap_write(sdev->regmap, CSI_CH_F0_BUFA_REG,
> > > > +		     (bus_addr + sdev->planar_offset[0]) >> 2);
> > 
> > Why do you need the bit shift? Does that work for you?
> > 
> > The User Manuals of both the V3s and the and the A33 (AKA R16) state that the 
> > BUFA field size in this register is 31:00, that is 32bit. I have found no 
> > indication of this bit shift in the Olimex provided sunxi-vfe[1] driver. On 
> > the A33 I have found that only after removing the bit-shift, (some sort of) 
> > data started to appear in the buffer.
> > 
> > [1] https://github.com/hehopmajieh/a33_linux/tree/master/drivers/media/video/sunxi-vfe
> 
> The Users Manuals do not document this bit shift. You should see line 10 to
> 32 in https://github.com/hehopmajieh/a33_linux/blob/master/drivers/media/video/sunxi-vfe/csi/csi_reg.c

Thanks. So for my reference, the SoCs that don't need bit shift are A31, A23, 
and A33. SoCs that need bit shift are A80, A83, H3, and V3s (AKA V30).

baruch

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