[PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change
Stephen Boyd
sboyd at codeaurora.org
Tue Jul 25 17:36:50 PDT 2017
On 07/23, Icenowy Zheng wrote:
> From: Chen-Yu Tsai <wens at csie.org>
>
> This patch utilizes the new PLL clk notifier to gate then ungate the
> PLL CPU clock after rate changes. This should prevent any system hangs
> resulting from cpufreq changes to the clk.
>
> Reported-by: Ondrej Jirman <megous at megous.com>
> Signed-off-by: Chen-Yu Tsai <wens at csie.org>
> Tested-by: Icenowy Zheng <icenowy at aosc.io>
> ---
Acked-by: Stephen Boyd <sboyd at codeaurora.org>
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