[PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection.

Mark Rutland mark.rutland at arm.com
Tue Jan 31 10:49:08 PST 2017


On Wed, Feb 01, 2017 at 02:43:02AM +0800, Fu Wei wrote:
> On 31 January 2017 at 01:49, Mark Rutland <mark.rutland at arm.com> wrote:
> > On Thu, Jan 26, 2017 at 01:49:03PM +0800, Fu Wei wrote:
> >> On 26 January 2017 at 01:25, Mark Rutland <mark.rutland at arm.com> wrote:
> >> > On Wed, Jan 25, 2017 at 02:46:12PM +0800, Fu Wei wrote:
> >> >> On 25 January 2017 at 01:24, Mark Rutland <mark.rutland at arm.com> wrote:
> >> >> > On Wed, Jan 18, 2017 at 09:25:32PM +0800, fu.wei at linaro.org wrote:
> >> >> >> From: Fu Wei <fu.wei at linaro.org>
> >
> >> But according to another document(ARMv8-A Foundation Platform User
> >> Guide  ARM DUI0677K),
> >> Table 3-2 ARMv8-A Foundation Platform memory map (continued)
> >>
> >> AP_REFCLK CNTBase0, Generic Timer 64KB   S
> >> AP_REFCLK CNTBase1, Generic Timer 64KB   S/NS
> >>
> >> Dose it means the timer frame 0 can be accessed in SECURE status  only,
> >> and the timer frame 1 can be accessed in both status?
> >
> > That does appear to be what it says.
> >
> > I assume in this case CNTCTLBase.CNTSAR<0> is RES0.
> >
> >> And because Linux kernel is running on Non-secure EL1, so should we
> >> skip "SECURE" timer in Linux?
> >
> > I guess you mean by checking the GTx Common flags, to see if the timer
> > is secure? Yes, we must skip those.
> 
> Yes, exactly.
> 
> I think we can check the  GTx Common flags, if the timer is set as
> SECURE, this driver should just skip this timer.

I completely agree that we must skip these.

> > Looking further at this, the ACPI spec is sorely lacking any statement
> > as to the configuration of CNTCTLBase.{CNTSAR,CNTTIDR,CNTACR}, so it's
> > not clear if we can access anything in a frame, even if it is listed as
> > being a non-secure timer.
> >
> > I think we need a stronger statement here. Otherwise, we will encounter
> > problems. Linux currently assumes that CNTCTLBase.CNTACR<N> is
> > writeable, given a non-secure frame N. This is only the case if
> > CNTCTLBase.CNTSAR.NS<N> == 1.
> 
> the original driver has checked these registers, but the problem is:
> What if the timer frame is designed to be a secure timer, all the
> register in this frame is only can be accessed in secure status, just
> like foundation model?
> Note: for foundation model, Please check Table 3-1 Access permissions
> of 3.1 ARMv8-A Foundation Platform memory map in ARMv8-A Foundation
> Platform User Guide
> 
> So I think we should check the GTDT first, if it's not a secure timer,
> then we can go on checking CNTSAR. :-)

I've clearly confused matters here. I completely agree that we must skip
timers the GTDT descrbies as secure.

My complaint here is that the spec does not explicitly state that
CNTCTLBase.CNTSAR.NS<N> must be set for timers *not* marked as secure
(though I believe that is the intent). That is a spec issue, not a code
issue.

We unfortunately can't check CNTNSAR, as it is secure-only. :(

Thanks,
Mark.



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