[PATCH 06/10] soc/qbman: Add ARM equivalent for flush_dcache_range()

[Russell King - ARM Linux]

On Fri, Jan 27, 2017 at 05:41:10PM +0100, Arnd Bergmann wrote:
> On Thu, Jan 26, 2017 at 6:08 AM, Scott Wood <scott.wood at nxp.com> wrote:
> > And even if we did all that, there would still be other manual cache
> > manipulation left in this driver, to deal with its cacheable register
> > interface.
> 
> I thought we had concluded that "cacheable register" is something
> that cannot work reliably on ARM at all when this came up before.
> Any updates on that?

There's a big comment in arch/arm/include/asm/io.h which explains
everything.  Nothing there is likely to change.

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