[PATCH v2 1/2] nvmem: sunxi-sid: add support for H3 and A64's SID controller

[maxime.ripard at free-electrons.com]

On Sun, Jan 29, 2017 at 09:56:40AM +0800, Icenowy Zheng wrote:
> H3 and A64 SoCs have a bigger SID controller, which has its direct read
> address at 0x200 position in the SID block, not 0x0.
> 
> Also, H3 SID controller has some silicon bug that makes the direct read
> value wrong at first, add code to workaround the bug. (This bug has
> already been fixed on A64 and later SoCs)
> 
> Signed-off-by: Icenowy Zheng <icenowy at aosc.xyz>

Please split that into several patches. One to allow to set the size
through the structure, one to support the A64, and one to support the
H3.

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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