[PATCH v2 2/2] ARM: sun8i: dt: Add mali node

[Rob Herring]

On Mon, Jan 23, 2017 at 03:00:46PM +0100, Maxime Ripard wrote:
> The A23 and A33 have an ARM Mali 400 GPU. Now that we have a binding, add
> it to our DT.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> ---
>  arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> index e4991a78ad73..982705719ef2 100644
> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> @@ -486,6 +486,32 @@
>  			#size-cells = <0>;
>  		};
>  
> +		mali: gpu at 01c40000 {

Drop leading 0.

> +			compatible = "allwinner,sun8i-a23-mali",
> +				     "allwinner,sun7i-a20-mali", "arm,mali-400";
> +			reg = <0x01c40000 0x10000>;

Does this really use 64K or that's just the register spacing? Set it to 
what's used.

> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "gp",
> +					  "gpmmu",
> +					  "pp0",
> +					  "ppmmu0",
> +					  "pp1",
> +					  "ppmmu1",
> +					  "pmu";
> +			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> +			clock-names = "bus", "core";
> +			resets = <&ccu RST_BUS_GPU>;
> +
> +			assigned-clocks = <&ccu CLK_GPU>;
> +			assigned-clock-rates = <408000000>;
> +		};
> +
>  		gic: interrupt-controller at 01c81000 {
>  			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
>  			reg = <0x01c81000 0x1000>,
> -- 
> git-series 0.8.11