[PATCH] mmc: meson-gx: add support for HS400 mode
Kevin Hilman
khilman at baylibre.com
Fri Jan 27 10:55:19 PST 2017
Heiner Kallweit <hkallweit1 at gmail.com> writes:
> Add support for HS400 mode.
>
> Successfully tested on a Odroid C2 (S905 GXBB).
>
> Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
Excellent! Thanks for the patch.
Reviewed-by: Kevin Hilman <khilman at baylibre.com>
Tested-by: Kevin Hilman <khilman at baylibre.com>
Some folks on IRC had reported that eMMC wasn't working on some boards
(like Amlogic P200) and with this patch, it's working again for me on P200.
@Andreas: does this patch fix your R-box Pro?
Kevin
> ---
> drivers/mmc/host/meson-gx-mmc.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
> index 030425be..be45d57d 100644
> --- a/drivers/mmc/host/meson-gx-mmc.c
> +++ b/drivers/mmc/host/meson-gx-mmc.c
> @@ -83,6 +83,7 @@
> #define CFG_RC_CC_MASK 0xf
> #define CFG_STOP_CLOCK BIT(22)
> #define CFG_CLK_ALWAYS_ON BIT(18)
> +#define CFG_CHK_DS BIT(20)
> #define CFG_AUTO_CLK BIT(23)
>
> #define SD_EMMC_STATUS 0x48
> @@ -412,6 +413,16 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> val &= ~(CFG_RC_CC_MASK << CFG_RC_CC_SHIFT);
> val |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT;
>
> + val &= ~CFG_DDR;
> + if (ios->timing == MMC_TIMING_UHS_DDR50 ||
> + ios->timing == MMC_TIMING_MMC_DDR52 ||
> + ios->timing == MMC_TIMING_MMC_HS400)
> + val |= CFG_DDR;
> +
> + val &= ~CFG_CHK_DS;
> + if (ios->timing == MMC_TIMING_MMC_HS400)
> + val |= CFG_CHK_DS;
> +
> writel(val, host->regs + SD_EMMC_CFG);
>
> if (val != orig)
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