[PATCH v4 10/13] arm64: allwinner: a64: Increase the MMC max frequency

Florian Vaussard florian.vaussard at heig-vd.ch
Fri Jan 27 02:29:53 PST 2017


Hi Maxime,

On 01/26/2017 10:06 AM, Maxime Ripard wrote:
> The eMMC controller seem to have a maximum frequency of 200MHz, while the
> regular MMC controllers are capped at 150MHz.
> 
> Since older SoCs cannot go that high, we cannot change the default maximum
> frequency, but fortunately for us we have a property for that in the DT.
> 
> This also has the side effect of allowing to use the MMC HS200 and SD
> SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs).
> 
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> 
> arm64: allwinner: a64: Limit MMC0 and MMC1 rates to 150MHz
> 
> Trying to set the bus to 200MHz on MMC1 when doing SDIO is failing.
> Allwinner sets the maximum for this bus to 150MHz, so enforce that limit.
> 
> This hasn't been tested with MMC0, but the documented limit is the same,
> and I expect the behaviour to be the same.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>

I suspect that you are trying to increase your number of Signed-off-by tags by
using unfair means :) Otherwise the squashed commit message is probably worth
some cleaning.

Best,
Florian

> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++
>  1 file changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 7b79c319ad3c..cb3e0cf2191a 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -130,6 +130,7 @@
>  			resets = <&ccu RST_BUS_MMC0>;
>  			reset-names = "ahb";
>  			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +			max-frequency = <150000000>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -143,6 +144,7 @@
>  			resets = <&ccu RST_BUS_MMC1>;
>  			reset-names = "ahb";
>  			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> +			max-frequency = <150000000>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -156,6 +158,7 @@
>  			resets = <&ccu RST_BUS_MMC2>;
>  			reset-names = "ahb";
>  			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			max-frequency = <200000000>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> 



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