[PATCH 1/2] clk: sunxi-ng: Call divider_round_rate if we only have a single parent

Chen-Yu Tsai wens at csie.org
Thu Jan 26 19:30:05 PST 2017


On Fri, Jan 27, 2017 at 8:12 AM, Stephen Boyd <sboyd at codeaurora.org> wrote:
> On 01/24, Maxime Ripard wrote:
>> The divider_get_val function that is used in our determine_rate callback
>> doesn't try to change the parent rate at all, while clk_divider_bestdiv,
>> used in divider_round_rate, does.
>>
>> If we have a single parent, call divider_round_rate.

I guess my "clk: sunxi-ng: mux: Get closest parent rate possible with
CLK_SET_RATE_PARENT" patch somewhat takes care of the multi-parent
case? Still, the underlying clock type doesn't get to specify what
is considers to be the best parent rate.

>> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
>> ---
>
> Acked-by: Stephen Boyd <sboyd at codeaurora.org>

Acked-by: Chen-Yu Tsai <wens at csie.org>



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